In the technical field of electronic devices and microelectromechanical systems (MEMS), there is a trend towards miniaturization and heterogeneous system integration. Among others, the desire for miniaturization and heterogeneous system integration calls for new packaging technologies which also allow large area processing and 3D integration with potential for low-cost applications. Two major packaging trends in this area are thin film technique and the so called Chip-in-Substrate Package technique (CiSP).
Typically, the main functions of a chip package may be to attach a semiconductor chip or semiconductor die at a printed circuit board (PCB) and to electrically connect the integrated circuit that is implemented on the semiconductor chip/die with the circuit(s) that is/are present on the printed circuit board. The chip may be arranged on an interposer. Furthermore, the package may provide protection for the die against damage and environmental influences (dirt, moisture, etc.).